Graduation assignment: Apply various optimization techniques for reduced layout Job in Veldhoven, Netherlands

ASML is one of the world’s leading manufacturers of chip-making equipment.

Our vision is to enable affordable microelectronics that improve the quality of life. To achieve this, our mission is to invent, develop, manufacture and service advanced technology for high-tech lithography, metrology and software solutions for the semiconductor industry.

ASML's guiding principle is continuing Moore's Law towards ever smaller, cheaper, more powerful and energy-efficient semiconductors. This results in increasingly powerful and capable electronics that enable the world to progress within a multitude of fields, including healthcare, technology, communications, energy, mobility, and entertainment.

Working at ASML
We provide the world’s top chipmakers everything they need to create better performing, cheaper semiconductor chips. Simply put: we are an industry leader supporting industry leaders.

As such, you’ll be encouraged to bring your best ideas and act on them. You’ll have the freedom, trust, and support in your field to experiment and solve complex challenges. Things are rarely dull when you’re constantly breaking new ground.

But despite our fast-paced environment at the forefront of tech, we take your work-life balance and wellbeing seriously. A business is only as good as its employees.

So join us, and you’ll be a part of a global collaboration. One that promotes creativity, the inclusion of highly diverse teams, and an exciting and dynamic work environment. Join us, and you’ll be a part of progress.

Graduation assignment: Apply various optimization techniques for reduced layout Job Description

Introduction
Are you a Master student with a strong interest in optimization and a broad knowledge of mathematics? Then this graduation assignment could be interesting for you.   

Job Mission
ASML produces lithographic scanner. These are very complex machines operating at nanometer precision. During the production of these scanners tests are performed to check the scanner performance. In some of these tests marks are printed out on a substrate and then read out. Reading out these marks is a time consuming process which could be optimized reading out less marks with minimal performance degradation.

Job Description
You will be asked to apply various optimization techniques to mark read out in ASML scanner tests. The aim is to reduce the number of marks which are read out with minimal performance degradation of the test outcomes. These techniques vary from applied statistics (like analysis of variance), to algorithms (like Evolutionary Algorithms), to applied mathematics. You will be working in a team of data scientists and you are expected to be able to carry on tasks by yourself.

Graduation assignment: Apply various optimization techniques for reduced layout Job Requirements

Education

• You are a Master’s student in Computer Science, applied Mathematics or applied Statistics.
• You have a strong interest in optimization and a broad knowledge of mathematics is a must together with a proven record of applications of optimization techniques and statistics.
• You must be able to code in Matlab.
• In addition, the English language is required, both in words as written.

Graduation assignment: Apply various optimization techniques for reduced layout Application Information

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