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An RF Digital Verification & Design Engineer develops and supports digital circuit design for cell libraries. Performs custom digital circuit design and simulation. Designs, develops, modifies and evaluates digital electronic parts, components or integrated circuitry for use in digital electronic equipment and other hardware systems. Determines design approaches and parameters. Performs digital circuit design, verification and layout, data path design and digital block synthesis.
In this position, you will be joining a team of system development engineers. Your focus will be mainly on digital design. This team is developing leading edge HW architectures for ASIC RF products for mobile applications, focusing on power efficient RTL implementation of DSP algorithms, which heavily interact with its control firmware.
This position is subject to the collective agreement for workers and employees in the electrical and electronics industry, employment group H (https://www.feei.at/kv-2017-0). A higher payment is negotiable depending on your expertise and skills. Prior to entering an employment agreement, the employee will be asked to provide all documents and references to verify any service times of prior employment. Based on provided documents the appropriate number of service years will be credited as prior employment.
Your responsibilities as an RF Digital Verification & Design Engineer will include :
Please apply with your CV and cover letter by the 'apply' button below
Remember - you found this opportunity on Qreer.com
Education Backgrounds: |
Electrical Engineering |
Specialties: |
Digital Design Hardware Design Modeling Telecommunications |
Education Level: |
Undergraduate (Bachelors) Postgraduate (Masters) |
Experience: |
0 - 2 years 2 - 5 years 5 - 10 Years |
Languages spoken: |
English |
Job Location: | Munich, Germany |
Keywords: | SystemC, Verilog, System Verilog, VHDL, Tcl, Perl, C++, Algorithm modelling, Matlab, Silicon Design and Verification e.g. DC-compiler, Primetime |
Type: Job
Deadline: 4th March 2018
Job reference (ID): 12425
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