ASML is one of the world’s leading manufacturers of chip-making equipment.
Our vision is to enable affordable microelectronics that improve the quality of life.
To achieve this, our mission is to invent, develop, manufacture and service advanced technology for high-tech lithography, metrology and software solutions for the semiconductor industry.
ASML's guiding principle is continuing Moore's Law towards ever smaller, cheaper, more powerful and energy-efficient semiconductors. This results in increasingly powerful and capable electronics that enable the world to progress within a multitude of fields, including healthcare, technology, communications, energy, mobility, and entertainment.
As a part of ASML's Metrology team, you will develop, realize and qualify mathematical solutions that are gating for the nanometer performance of our lithographic machines and enable the extension of the roadmap of the lithographic industry (Moore's law).
Job Description
Metrology software solutions incorporate system design aspects that cover the spectrum from development, realization, integration, manufacturing, installation, to support. A metrology design engineer is responsible for designingTo advance our metrology competence is another aspect of the work. This way we stay on top of what's required to assure the timely delivery of state of the art solutions for ASML's product roadmap.
Context of the position
This position is within the DUV D&E Department – SPM & Wafer Table, which is responsible for the positioning of the wafer and reticle in ASML's wafer scanners and for the measurements, models and calibrations which are required for optimal positioning.The holder of this position reports to the Group Leader Grid & SPM Metrology and operates within a multidisciplinary development project team.
MSc, PDEng or PhD in engineering (physics, mathematics, mechanical, electrical).
Experience
Experience with Matlab, Mathematica, Maple, or similar packages is required. Experience in a technical product development environment is a pre. Knowledge about the SW development process and tools is also beneficial.
Personal skills
We expect you to be a good communicator, team player, self-starter, to take initiative and to be result oriented.
Other Information The DE DUV sector is internally responsible for the specification and development of ASML DUV products. The Wafer Table and SPM department is responsible for developing of a wafer positioning system that is needed for accurate projection of the ic-design layer onto a wafer. The department is divided into multiple groups each of which works in its own specialist subsystem / area. Job interviews will be scheduled on 23rd of September (Friday afternoon)
Please apply with your CV and cover letter by the 'apply' button below
Remember - you found this opportunity on Qreer.com
Education Backgrounds: |
Mathematics Mechanical Engineering Physics |
Specialties: |
Algorithms Modeling Research (R&D) Semiconductor Physics |
Education Level: |
Postgraduate (Masters) Doctorate (PH.D) |
Experience: |
0 - 2 years 2 - 5 years 5 - 10 Years |
Languages spoken: |
English |
Job Location: | Veldhoven, Netherlands |
Type: Job
Deadline: 6th October 2016
Job reference (ID): 10908
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